#include <rex/xenos/ucode.h>
ALU instruction of 3 dwords holding a vector operation and a scalar operation.
◆ GetConstant0WriteMask()
| u32 rex::xenos::ucode::AluInstruction::GetConstant0WriteMask |
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const |
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inline |
Returns the export components that receive constant 0. The result is empty when the instruction is not an export.
◆ GetConstant1WriteMask()
| u32 rex::xenos::ucode::AluInstruction::GetConstant1WriteMask |
( |
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const |
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inline |
Returns the export components that receive constant 1. The result is empty when the instruction is not an export.
◆ GetPredicateCondition()
| bool rex::xenos::ucode::AluInstruction::GetPredicateCondition |
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const |
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inline |
Returns the predicate value that enables the instruction.
◆ GetScalarConstRegOpSrcTempReg()
| u32 rex::xenos::ucode::AluInstruction::GetScalarConstRegOpSrcTempReg |
( |
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const |
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inline |
Returns the temporary register of a scalar operation that takes a constant and a register.
◆ GetScalarOpResultWriteMask()
| u32 rex::xenos::ucode::AluInstruction::GetScalarOpResultWriteMask |
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const |
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inline |
Returns the write mask of the scalar operation result. In an export it excludes the components in the vector write mask, as those come from the vector operation or are constant 1.
◆ GetScalarWriteMask()
| u32 rex::xenos::ucode::AluInstruction::GetScalarWriteMask |
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const |
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inline |
Returns the scalar write mask, 1 bit per component.
◆ GetSrcReg()
| u32 rex::xenos::ucode::AluInstruction::GetSrcReg |
( |
size_t | i | ) |
const |
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inline |
Returns the register index of a constant source, or the packed value of a temporary register source.
- Parameters
-
| i | 1 based source operand index. |
◆ GetSrcSwizzle()
| u32 rex::xenos::ucode::AluInstruction::GetSrcSwizzle |
( |
size_t | i | ) |
const |
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inline |
Returns the component relative swizzle of a source operand, 2 bits per component.
- Parameters
-
| i | 1 based source operand index. |
◆ GetSrcTempReg()
| constexpr u32 rex::xenos::ucode::AluInstruction::GetSrcTempReg |
( |
u32 | src_reg | ) |
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inlinestaticconstexpr |
Returns the temporary register index of a packed temporary register source.
- Parameters
-
| src_reg | Packed temporary register from src_reg. |
◆ GetSwizzledComponentIndex()
| constexpr u32 rex::xenos::ucode::AluInstruction::GetSwizzledComponentIndex |
( |
u32 | swizzle, |
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u32 | component_index ) |
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inlinestaticconstexpr |
Returns the absolute component index from a component relative swizzle.
◆ GetVectorOpResultWriteMask()
| u32 rex::xenos::ucode::AluInstruction::GetVectorOpResultWriteMask |
( |
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const |
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inline |
Returns the write mask of the vector operation result. Unused export components are included so the disassembly reassembles.
◆ GetVectorWriteMask()
| u32 rex::xenos::ucode::AluInstruction::GetVectorWriteMask |
( |
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const |
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inline |
Returns the vector write mask, 1 bit per component.
◆ HasAbsConstants()
| bool rex::xenos::ucode::AluInstruction::HasAbsConstants |
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const |
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inline |
Reports whether constant operands take the absolute value.
◆ IsConst0Addressed()
| bool rex::xenos::ucode::AluInstruction::IsConst0Addressed |
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const |
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inline |
Reports whether the first constant operand is relatively addressed.
◆ IsConst1Addressed()
| bool rex::xenos::ucode::AluInstruction::IsConst1Addressed |
( |
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const |
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inline |
Reports whether the second constant operand is relatively addressed.
◆ IsConstAddressRegisterRelative()
| bool rex::xenos::ucode::AluInstruction::IsConstAddressRegisterRelative |
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const |
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inline |
Reports whether relatively addressed constants are indexed by the address register a0 rather than the loop counter aL.
◆ IsExport()
| bool rex::xenos::ucode::AluInstruction::IsExport |
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const |
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inline |
Reports whether data is exported, rather than written to local registers.
◆ IsSrcConstAddressed()
| bool rex::xenos::ucode::AluInstruction::IsSrcConstAddressed |
( |
size_t | i | ) |
const |
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inline |
Reports whether the constant slot of a source operand is relatively addressed, even when the operand is a temporary register.
const_0_rel_abs applies when no previous operand is a constant and const_1_rel_abs otherwise. Operand 3 is the constant of mulsc, addsc and subsc.
- Parameters
-
| i | 1 based source operand index. |
- Returns
- True when the constant operand is relatively addressed.
◆ IsSrcNegated()
| bool rex::xenos::ucode::AluInstruction::IsSrcNegated |
( |
size_t | i | ) |
const |
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inline |
Reports whether a source operand is negated.
- Parameters
-
| i | 1 based source operand index. |
◆ IsSrcTemp()
| bool rex::xenos::ucode::AluInstruction::IsSrcTemp |
( |
size_t | i | ) |
const |
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inline |
Reports whether a source operand is a temporary register rather than a constant.
- Parameters
-
| i | 1 based source operand index. |
◆ IsSrcTempRelative()
| constexpr bool rex::xenos::ucode::AluInstruction::IsSrcTempRelative |
( |
u32 | src_reg | ) |
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inlinestaticconstexpr |
Reports whether a temporary register source is relatively addressed.
- Parameters
-
| src_reg | Packed temporary register from src_reg. |
◆ IsSrcTempValueAbsolute()
| constexpr bool rex::xenos::ucode::AluInstruction::IsSrcTempValueAbsolute |
( |
u32 | src_reg | ) |
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inlinestaticconstexpr |
Reports whether a temporary register source takes the absolute value.
- Parameters
-
| src_reg | Packed temporary register from src_reg. |
The documentation for this struct was generated from the following file:
1.18.0