packet.h

Go to the documentation of this file.

 
#pragma once
 
#include <rex/assert.h>
#include <rex/memory/endian.h>
#include <rex/types.h>
 
namespace rex::xenos {

constexpr memory::FourCCT kSwapSignature = memory::make_fourcc("SWAP");

enum Event : u8 {
  VS_DEALLOC = 0,
  PS_DEALLOC = 1,
  VS_DONE_TS = 2,
  PS_DONE_TS = 3,
  CACHE_FLUSH_TS = 4,
  CONTEXT_DONE = 5,
  CACHE_FLUSH = 6,
  VIZQUERY_START = 7,
  VIZQUERY_END = 8,
  SC_WAIT_WC = 9,
  MPASS_PS_CP_REFETCH = 10,
  MPASS_PS_RST_START = 11,
  MPASS_PS_INCR_START = 12,
  RST_PIX_CNT = 13,
  RST_VTX_CNT = 14,
  TILE_FLUSH = 15,
  CACHE_FLUSH_AND_INV_TS_EVENT = 20,
  ZPASS_DONE = 21,
  CACHE_FLUSH_AND_INV_EVENT = 22,
  PERFCOUNTER_START = 23,
  PERFCOUNTER_STOP = 24,
  SCREEN_EXT_INIT = 25,
  SCREEN_EXT_RPT = 26,
  VS_FETCH_DONE_TS = 27,
};
 
// clang-format off
enum Type3Opcode : u8 {
  PM4_ME_INIT               = 0x48, 
  PM4_NOP                   = 0x10, 
  PM4_INDIRECT_BUFFER       = 0x3f, 
  PM4_INDIRECT_BUFFER_PFD   = 0x37, 
  PM4_WAIT_FOR_IDLE         = 0x26,
  PM4_WAIT_REG_MEM          = 0x3c, 
  PM4_WAIT_REG_EQ           = 0x52,
  PM4_WAIT_REG_GTE          = 0x53,
  PM4_WAIT_UNTIL_READ       = 0x5c,
  PM4_WAIT_IB_PFD_COMPLETE  = 0x5d, 
  PM4_REG_RMW               = 0x21, 
  PM4_REG_TO_MEM            = 0x3e, 
  PM4_MEM_WRITE             = 0x3d, 
  PM4_MEM_WRITE_CNTR        = 0x4f, 
  PM4_COND_EXEC             = 0x44, 
  PM4_COND_WRITE            = 0x45, 
  PM4_EVENT_WRITE           = 0x46, 
  PM4_EVENT_WRITE_SHD       = 0x58, 
  PM4_EVENT_WRITE_CFL       = 0x59, 
  PM4_EVENT_WRITE_EXT       = 0x5a, 
  PM4_EVENT_WRITE_ZPD       = 0x5b, 
  PM4_DRAW_INDX             = 0x22, 
  PM4_DRAW_INDX_2           = 0x36, 
  PM4_DRAW_INDX_BIN         = 0x34, 
  PM4_DRAW_INDX_2_BIN       = 0x35, 
  PM4_VIZ_QUERY             = 0x23, 
  PM4_SET_STATE             = 0x25, 
  PM4_SET_CONSTANT          = 0x2d, 
  PM4_SET_CONSTANT2         = 0x55, 
  PM4_SET_SHADER_CONSTANTS  = 0x56, 
  PM4_LOAD_ALU_CONSTANT     = 0x2f, 
  PM4_IM_LOAD               = 0x27, 
  PM4_IM_LOAD_IMMEDIATE     = 0x2b, 
  PM4_LOAD_CONSTANT_CONTEXT = 0x2e, 
  PM4_INVALIDATE_STATE      = 0x3b, 
  PM4_SET_SHADER_BASES      = 0x4A, 
  PM4_SET_BIN_BASE_OFFSET   = 0x4B, 
  PM4_SET_BIN_MASK          = 0x50, 
  PM4_SET_BIN_SELECT        = 0x51, 
  PM4_CONTEXT_UPDATE        = 0x5e, 
  PM4_INTERRUPT             = 0x54,
  PM4_XE_SWAP               = 0x64, 
  PM4_IM_STORE              = 0x2c, 
  PM4_SET_BIN_MASK_LO       = 0x60, 
  PM4_SET_BIN_MASK_HI       = 0x61,
  PM4_SET_BIN_SELECT_LO     = 0x62,
  PM4_SET_BIN_SELECT_HI     = 0x63,
};
// clang-format on

inline u32 BuildPacketType0(u16 index, u16 count, bool one_reg = false) {
  REX_ASSERT(index <= 0x7FFF);
  REX_ASSERT(count >= 1 && count <= 0x4000);
  return (0u << 30) | (((count - 1) & 0x3FFF) << 16) | (one_reg ? 1u << 15 : 0u) | (index & 0x7FFF);
}

inline u32 BuildPacketType1(u16 index_1, u16 index_2) {
  REX_ASSERT(index_1 <= 0x7FF);
  REX_ASSERT(index_2 <= 0x7FF);
  return (1u << 30) | ((index_2 & 0x7FF) << 11) | (index_1 & 0x7FF);
}

constexpr u32 BuildPacketType2() {
  return (2u << 30);
}

inline u32 BuildPacketType3(Type3Opcode opcode, u16 count, bool predicate = false) {
  REX_ASSERT(opcode <= 0x7F);
  REX_ASSERT(count >= 1 && count <= 0x4000);
  return (3u << 30) | (((count - 1) & 0x3FFF) << 16) | ((opcode & 0x7F) << 8) | (predicate ? 1 : 0);
}
 
}  // namespace rex::xenos