rex::xenos::reg Namespace Reference

Classes
union	COHER_STATUS_HOST
union	WAIT_UNTIL
union	SQ_PROGRAM_CNTL
union	SQ_CONTEXT_MISC
union	SQ_INTERPOLATOR_CNTL
union	SQ_VS_CONST
union	SQ_PS_CONST
union	VGT_DMA_SIZE
union	VGT_DRAW_INITIATOR
union	VGT_MULTI_PRIM_IB_RESET_INDX
union	VGT_INDX_OFFSET
union	VGT_MIN_VTX_INDX
union	VGT_MAX_VTX_INDX
union	VGT_OUTPUT_PATH_CNTL
union	VGT_HOS_CNTL
union	PA_SU_POINT_MINMAX
union	PA_SU_POINT_SIZE
union	PA_SU_SC_MODE_CNTL
union	PA_SU_VTX_CNTL
union	PA_SC_MPASS_PS_CNTL
union	PA_SC_VIZ_QUERY
union	PA_CL_CLIP_CNTL
union	PA_CL_VTE_CNTL
union	PA_SC_SCREEN_SCISSOR_TL
union	PA_SC_SCREEN_SCISSOR_BR
union	PA_SC_WINDOW_OFFSET
union	PA_SC_WINDOW_SCISSOR_TL
union	PA_SC_WINDOW_SCISSOR_BR
union	RB_MODECONTROL
union	RB_SURFACE_INFO
union	RB_COLORCONTROL
union	RB_COLOR_INFO
union	RB_COLOR_MASK
union	RB_BLENDCONTROL
union	RB_DEPTHCONTROL
union	RB_STENCILREFMASK
union	RB_DEPTH_INFO
union	RB_COPY_CONTROL
union	RB_COPY_DEST_INFO
union	RB_COPY_DEST_PITCH
union	DC_LUT_RW_INDEX
union	DC_LUT_SEQ_COLOR
union	DC_LUT_PWL_DATA
union	DC_LUT_30_COLOR

Detailed Description

Register layouts. Every bit, including unused ones, is a named field so register values compare stably. Bit fields use only 32 bit types because MSVC restarts packing when the alignment changes.