exception_handler.h

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#pragma once
 
#include <functional>
#include <vector>
 
#include <rex/assert.h>
#include <rex/platform.h>
#include <rex/types.h>
 
#if !REX_PLATFORM_WIN32
#include <signal.h>
#endif
 
namespace rex::platform {
 
struct alignas(16) VectorRegister {
  u8 bytes[16];
};

enum class ARM64Register : u8 {
  kX0,
  kX1,
  kX2,
  kX3,
  kX4,
  kX5,
  kX6,
  kX7,
  kX8,
  kX9,
  kX10,
  kX11,
  kX12,
  kX13,
  kX14,
  kX15,
  kX16,
  kX17,
  kX18,
  kX19,
  kX20,
  kX21,
  kX22,
  kX23,
  kX24,
  kX25,
  kX26,
  kX27,
  kX28,
  kX29, 
  kX30, 
  kSP,
  kPC,
  kPstate,
  kFpsr,
  kFpcr,
  kV0, 
  kV1,
  kV2,
  kV3,
  kV4,
  kV5,
  kV6,
  kV7,
  kV8,
  kV9,
  kV10,
  kV11,
  kV12,
  kV13,
  kV14,
  kV15,
  kV16,
  kV17,
  kV18,
  kV19,
  kV20,
  kV21,
  kV22,
  kV23,
  kV24,
  kV25,
  kV26,
  kV27,
  kV28,
  kV29,
  kV30,
  kV31,
};
 
#if REX_ARCH_AMD64

enum class X64Register : u8 {
  kRip,
  kEflags,
  kIntRegisterFirst,
  kRax = kIntRegisterFirst,
  kRcx,
  kRdx,
  kRbx,
  kRsp,
  kRbp,
  kRsi,
  kRdi,
  kR8,
  kR9,
  kR10,
  kR11,
  kR12,
  kR13,
  kR14,
  kR15,
  kIntRegisterLast = kR15,
  kXMM0,
  kXMM1,
  kXMM2,
  kXMM3,
  kXMM4,
  kXMM5,
  kXMM6,
  kXMM7,
  kXMM8,
  kXMM9,
  kXMM10,
  kXMM11,
  kXMM12,
  kXMM13,
  kXMM14,
  kXMM15,
};
 
#endif  // REX_ARCH_AMD64
 
#if REX_ARCH_AMD64
using HostRegister = X64Register;
#elif REX_ARCH_ARM64
using HostRegister = ARM64Register;
#else
enum class HostRegister {};
#endif  // REX_ARCH

class HostThreadContext {
 public:
#if REX_ARCH_AMD64
  u64 rip;
  u32 eflags;
  union {
    struct {
      u64 rax;
      u64 rcx;
      u64 rdx;
      u64 rbx;
      u64 rsp;
      u64 rbp;
      u64 rsi;
      u64 rdi;
      u64 r8;
      u64 r9;
      u64 r10;
      u64 r11;
      u64 r12;
      u64 r13;
      u64 r14;
      u64 r15;
    };
    u64 int_registers[16]; 
  };
  union {
    struct {
      VectorRegister xmm0;
      VectorRegister xmm1;
      VectorRegister xmm2;
      VectorRegister xmm3;
      VectorRegister xmm4;
      VectorRegister xmm5;
      VectorRegister xmm6;
      VectorRegister xmm7;
      VectorRegister xmm8;
      VectorRegister xmm9;
      VectorRegister xmm10;
      VectorRegister xmm11;
      VectorRegister xmm12;
      VectorRegister xmm13;
      VectorRegister xmm14;
      VectorRegister xmm15;
    };
    VectorRegister xmm_registers[16];
  };
#elif REX_ARCH_ARM64
  u64 x[31]; 
  u64 sp;
  u64 pc;
  u64 pstate;
  u32 fpsr;
  u32 fpcr;
  VectorRegister v[32];
#endif  // REX_ARCH
};
 
/*
 * AArch64 load and store decoding based on VIXL.
 * https://github.com/Linaro/vixl/blob/ae5957cd66517b3f31dbf37e9bf39db6594abfe3/src/aarch64/constants-aarch64.h
 *
 * Copyright 2015, VIXL authors
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 *   * Redistributions of source code must retain the above copyright notice,
 *     this list of conditions and the following disclaimer.
 *   * Redistributions in binary form must reproduce the above copyright notice,
 *     this list of conditions and the following disclaimer in the documentation
 *     and/or other materials provided with the distribution.
 *   * Neither the name of ARM Limited nor the names of its contributors may be
 *     used to endorse or promote products derived from this software without
 *     specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

constexpr u32 kARM64LoadLiteralFMask = UINT32_C(0x3B000000);
constexpr u32 kARM64LoadLiteralFixed = UINT32_C(0x18000000);
 
constexpr u32 kARM64LoadStoreAnyFMask = UINT32_C(0x0A000000);
constexpr u32 kARM64LoadStoreAnyFixed = UINT32_C(0x08000000);
 
constexpr u32 kARM64LoadStorePairAnyFMask = UINT32_C(0x3A000000);
constexpr u32 kARM64LoadStorePairAnyFixed = UINT32_C(0x28000000);
constexpr u32 kARM64LoadStorePairLoadBit = UINT32_C(1) << 22;

constexpr u32 kARM64LoadStoreMask = UINT32_C(0xC4C00000);

enum class ARM64LoadStoreOp : u32 {
  kSTRBW = UINT32_C(0x00000000),  
  kSTRHW = UINT32_C(0x40000000),  
  kSTRW = UINT32_C(0x80000000),   
  kSTRX = UINT32_C(0xC0000000),   
  kLDRBW = UINT32_C(0x00400000),  
  kLDRHW = UINT32_C(0x40400000),  
  kLDRW = UINT32_C(0x80400000),   
  kLDRX = UINT32_C(0xC0400000),   
  kLDRSBX = UINT32_C(0x00800000), 
  kLDRSHX = UINT32_C(0x40800000), 
  kLDRSWX = UINT32_C(0x80800000), 
  kLDRSBW = UINT32_C(0x00C00000), 
  kLDRSHW = UINT32_C(0x40C00000), 
  kSTRB = UINT32_C(0x04000000),   
  kSTRH = UINT32_C(0x44000000),   
  kSTRS = UINT32_C(0x84000000),   
  kSTRD = UINT32_C(0xC4000000),   
  kSTRQ = UINT32_C(0x04800000),   
  kLDRB = UINT32_C(0x04400000),   
  kLDRH = UINT32_C(0x44400000),   
  kLDRS = UINT32_C(0x84400000),   
  kLDRD = UINT32_C(0xC4400000),   
  kLDRQ = UINT32_C(0x04C00000),   
  kPRFM = UINT32_C(0xC0800000),   
};

constexpr u32 kARM64LoadStoreOffsetFMask = UINT32_C(0x3B200C00);

enum class ARM64LoadStoreOffsetFixed : u32 {
  kUnscaledOffset = UINT32_C(0x38000000), 
  kPostIndex = UINT32_C(0x38000400),      
  kPreIndex = UINT32_C(0x38000C00),       
  kRegisterOffset = UINT32_C(0x38200800),
};

constexpr u32 kARM64LoadStoreUnsignedOffsetFMask = UINT32_C(0x3B000000);
constexpr u32 kARM64LoadStoreUnsignedOffsetFixed = UINT32_C(0x39000000);

REX_API bool IsARM64LoadPrefetchStore(u32 instruction, bool& is_store_out);

class Exception {
 public:
  enum class Code : u8 {
    kInvalidException = 0, 
    kAccessViolation,
    kIllegalInstruction,
  };
 
  enum class AccessViolationOperation : u8 {
    kUnknown,
    kRead,
    kWrite,
  };

  void InitializeAccessViolation(HostThreadContext* thread_context, u64 fault_address,
                                 AccessViolationOperation operation) {
    code_ = Code::kAccessViolation;
    thread_context_ = thread_context;
    fault_address_ = fault_address;
    access_violation_operation_ = operation;
  }
 
  void InitializeIllegalInstruction(HostThreadContext* thread_context) {
    code_ = Code::kIllegalInstruction;
    thread_context_ = thread_context;
  }
 
  Code GetCode() const { return code_; }

  HostThreadContext* GetThreadContext() const { return thread_context_; }
 
  u64 GetPC() const {
#if REX_ARCH_AMD64
    return thread_context_->rip;
#elif REX_ARCH_ARM64
    return thread_context_->pc;
#else
    REX_ASSERT_ALWAYS();
    return 0;
#endif  // REX_ARCH
  }
 
  void SetResumePC(u64 pc) {
#if REX_ARCH_AMD64
    thread_context_->rip = pc;
#elif REX_ARCH_ARM64
    thread_context_->pc = pc;
#else
    REX_ASSERT_ALWAYS();
#endif  // REX_ARCH
  }
 
#if REX_ARCH_AMD64
  u64& ModifyIntRegister(u32 index) {
    REX_ASSERT(index <= 15);
    modified_int_registers_ |= UINT16_C(1) << index;
    return thread_context_->int_registers[index];
  }

  u16 GetModifiedIntRegisters() const { return modified_int_registers_; }

  VectorRegister& ModifyXMMRegister(u32 index) {
    REX_ASSERT(index <= 15);
    modified_xmm_registers_ |= UINT16_C(1) << index;
    return thread_context_->xmm_registers[index];
  }

  u16 GetModifiedXMMRegisters() const { return modified_xmm_registers_; }
#elif REX_ARCH_ARM64
  u64& ModifyXRegister(u32 index) {
    REX_ASSERT(index <= 30);
    modified_x_registers_ |= UINT32_C(1) << index;
    return thread_context_->x[index];
  }

  u32 GetModifiedXRegisters() const { return modified_x_registers_; }

  VectorRegister& ModifyVRegister(u32 index) {
    REX_ASSERT(index <= 31);
    modified_v_registers_ |= UINT32_C(1) << index;
    return thread_context_->v[index];
  }

  u32 GetModifiedVRegisters() const { return modified_v_registers_; }
#endif  // REX_ARCH

  u64 GetFaultAddress() const { return fault_address_; }
 
  AccessViolationOperation GetAccessViolationOperation() const {
    return access_violation_operation_;
  }
 
 private:
  Code code_ = Code::kInvalidException;
  HostThreadContext* thread_context_ = nullptr;
#if REX_ARCH_AMD64
  u16 modified_int_registers_ = 0;
  u16 modified_xmm_registers_ = 0;
#elif REX_ARCH_ARM64
  u32 modified_x_registers_ = 0;
  u32 modified_v_registers_ = 0;
#endif  // REX_ARCH
  u64 fault_address_ = 0;
  AccessViolationOperation access_violation_operation_ = AccessViolationOperation::kUnknown;
};

class REX_API ExceptionHandler {
 public:
  using Handler = bool (*)(Exception* ex, void* data);

  static void Install(Handler fn, void* data);

  static void Uninstall(Handler fn, void* data);
};
 
#if !REX_PLATFORM_WIN32
REX_API u64 SignalPC(void* signal_context);

REX_API void ReportFatalSignal(int signal_number, siginfo_t* info, void* signal_context);

REX_API void ForwardSignal(struct sigaction& original, int signal_number, siginfo_t* info,
                           void* signal_context);

[[noreturn]] REX_API void DieWithDefaultDisposition(int signal_number);
#endif
 
}  // namespace rex::platform